Details
Presenter(s)
![Chuangguo Wang Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/17301.jpg?h=ff2033e8&itok=oLe9qoTI)
Display Name
Chuangguo Wang
- Affiliation
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AffiliationFudan University
- Country
Abstract
This paper presents a 0.5-3GHz full-duplex (FD) self-interference (SI) canceling receiver based on an unique Cartesian canceller. A prototype FD receiver is implemented in CMOS 65nm technology. In FD mode, more than 27dB SI suppression is achieved in single RF domain, and the effective IB-IIP3 of the receiver is improved from -5dBm to 5dBm with less than 1.2dB noise degradation. The noise figure is better than 7.8dB in FD mode over the working bandwidth. The core area of proposed FD-RX is 0.45mm². The power consumption of entire FD-RX including canceller is 25-54mW from 1.2V power supply.