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AffiliationIndian Institute of Technology Hyderabad
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A 0.13 nW ultra-low-power over-temperature protection circuit is proposed for highly integrated System-on-Chips (SoC). The circuit detects a temperature of 120°C but can be programmed for other temperature thresholds. The temperature detection is achieved by comparing a reference voltage with a 2-transistor ultra-low-power inverter architecture. The 2-transistor inverter is designed to have a proportional-to-absolute-temperature (PTAT) threshold characteristic, and the reference voltage is generated on-chip with a 2-transistor reference. The design is implemented in 0.18 μm CMOS technology and occupies an area of 0.0117 mm². The design operates from 0.5 V supply voltage and has a line sensitivity of 0.1°C/V and a hysteresis width of 7.7°C, as seen from simulations. The trim-free design has a worst-case process variation of 4%.