In this paper, we present an accelerator using a short-bit-length data format to decode visual information for a brain-computer interface (BCI) system. We implemented the decoding process on the proposed accelerator with 10-bit floating-point format consisting of the sign, a 6-bit exponent and a 3-bit mantissa for 256×256 RGB video image generation. By introducing the 3-bit mantissa for the 23-layer operation including convolution, deconvolution, and leaky ReLU, the image was decoded at a peak signal-to-noise ratio of around 30 dB. The implementation of the proposed accelerator in a single FPGA exhibited performance of 168 GOPS at 250-MHz clock speed.