We propose a simple neuronal cell for the implementation of low power and low area spiking neural networks. The neuronal cell mimics the performance of biological neural systems by combining both analog and digital circuits. This mixed-signal approach makes use of minimum-size sub-threshold biased devices. Additionally, conventional leaky integrate-andfire model is simplified leading to smaller and simpler neuronal cells. The proposed cell is designed using a 50-nm CMOS node and its performance is validated by transient simulation. Power consumption and area are estimated, showing great potential in comparison to equivalent state-of-the-art solutions. Finally behavioral equations are proposed and matched to transient schematic simulations to make them available for future training tasks. The proposed neuronal cell attempts to become a suitable solution for ultra-low power smart devices with computing at the edge, such as wearables or remote sensors.