The Hardware implementation of Empirical mode decomposition algorithm is more attracts in recent years due to its data driven nature, adaptability and ability to process nonlinear,nor stationary signal analysis.Due to its high computations in sifting process ,difficult to achieve low hardware complexity.In our proposed design,we introduced an efficient VLSI architecture of Cubic spline interpolation technique based on the Coordinate Rotation Digital Computer(CORDIC) for generation of envelops in the EMD algorithm .We were implemented on Xilinx ZynqU ltraScale+ZCU102 Evaluation Board(xczu9eg-ffvb1156- 2-e) and synthesized on Vivado 2018.1 Design suite with fixed point data format and generated envelops in sifting procedure