This paper presents the inverter-based pseudo-differential reconfigurable pixel array for multimodal and high-density neural recordings. For monitoring multimodal neural activity through various sensors, the pixel array can change its recording configuration between voltage- and current-recording modes. To conduct high-density neural recording, the recording circuits need to be designed area-efficiently. To achieve this goal, we employ the inverter-based structure for the CCIA and use its parasitic capacitance between the gate and drain terminals as the feedback capacitor, thus reducing the input capacitor of the CCIA considerably. Also, thanks to the use of CDCL using only two transistors, the current recording is conducted without a significant increase in the design area. The proposed pixel circuit array, implemented in a 180-nm CMOS process, achieves the input noise of 5.86 μVrms and 18.17 pArms for voltage- and current-recording modes over 10-kHz bandwidth, respectively.