With Moore's law reaching its limits, the use of new materials or new devices' structure has emerged as the next generation of CMOS devices. Among all, tunneling field-effect transistors (TFETs) have achieved a steep sub-threshold slope of less than 60mV/decade yet there is a lack of a complete process design kit (PDK) for large-scale circuit design. Hence, we present an open-source 15nm TFET PDK (15nmTFETPDK), which is based on FreePDK15 with additional support for open-source TFET models and its associated Cadence Virtuoso pcell in OA format and Mentor Calibre physical verification files. Our users can design their circuit in the Cadence Virtuoso platform and verify the consistency of the drawn layout and the circuit through the Calibre Platform. We hope that this open-source PDK allows them to further advance their research with new emerging devices.