This paper presents the design of a power management circuit consisting of a dual output regulating rectifier configuration featuring pulse width modulation (PWM) and pulse frequency modulation (PFM) to control the regulated output of 1.8 V and 3.3 V from a single input ac voltage. The PFM control feedback consists of feedback-driven regulation to adjust the driving frequency of the power transistors through the buffer in the topology. The PWM mode control provides a feedback loop to accurately adjust the conduction duration. Simulation results show that the dual regulating rectifier has a voltage conversion efficiency of 94.3% with an ac input magnitude of 3.5 V. The power conversion efficiency of the regulated 3.3 V output voltage is 82.3%. The design also includes an adiabatic charge pump (CP) consisting of latch-up and power-saving topologies with an overall efficiency of 92.9% and on-chip capacitance of 60 pF. The circuit was designed in 180-nm CMOS technology.