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Video s3
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    Presenter(s)
    Siddhartha Raman Sundara Raman Headshot
    Affiliation
    Affiliation
    University of Texas at Austin
    Country
    Abstract

    The memory wall bottleneck in ML accelerators can be mitigated by performing computations in the memory (CIM) array. Among various embedded memories, eDRAM using BEOL integrated Indium Gallium Zinc Oxide (IGZO) transistors is a promising candidate. IGZO transistor having extremely low leakage when used as an access transistor of eDRAM bitcell can enable multi-level-cell (MLC) functionality. Higher bandwidth can be achieved by 3D stacking multiple IGZO devices. In this paper, we present an IGZO eDRAM CIM architecture. A representative neural network using IGZO eDRAM achieves 80% Top-1 accuracy for the CIFAR-10 dataset, which is within 3% of ideal software accuracy.

    Slides
    • Compute-in-eDRAM with Backend Integrated Indium Gallium Zinc Oxide Transistors (application/pdf)