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AffiliationRyerson University
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This paper proposes an all-digital bi-directional gated ring oscillator (BDGRO) time integrator for time-based mixed-signal processing. The proposed time integrator features the ability of accommodating both positive and negative time inputs without a DC time offset, a virtually unlimited dynamic range with small silicon area and ultra-low power consumption, full compatibility with technology, rapid integration, and built-in digitization.. An ultra-low power high-speed bi-directional gated delay line (BDGDL) up/down counter is also proposed as part of the proposed time integrator. The time integrator is designed in a TSMC 130 nm 1.2 V CMOS technology and analyzed using Spectre with BSIM3.3 device models. Operated at 20 MS/s, the time integrator exhibits a clean spectrum without noticeable harmonics and consumes only 0.25 mW with a gain of 16.48 dB.