Neuromorphic engineering is a promising strategy for developing edge computing devices that are both faster and more efficient. These devices can bring the power of machine learning (ML) algorithms to the end user on mobile platforms. We demonstrate in this paper a proof of concept for fully analog/mixed-signals CMOS neuromorphic system-on-chip (NeuroSoC) by designing a leaky-Integrate-and-Fire (LIF) neuron. We present a low-power implementation of a LIF neuron that consumes 1.2 fJ/spike and occupies an active area of 6.73 um by 5.09 um. The design has eight transistors and two capacitors reducing considerably the complexity of the design. This LIF design only generates one spiking mode which is the Regular Spiking (RS) mode.