Skip to main content
Video s3
    Details
    Presenter(s)
    Chiara Venezia Headshot
    Display Name
    Chiara Venezia
    Affiliation
    Affiliation
    Università degli Studi di Catania
    Country
    Country
    Italy
    Author(s)
    Affiliation
    Affiliation
    Università degli Studi di Catania
    Display Name
    Salvatore Pennisi
    Affiliation
    Affiliation
    Universita di Catania
    Display Name
    Chiara Venezia
    Affiliation
    Affiliation
    Università degli Studi di Catania
    Abstract

    In this paper a resistor-less voltage reference generator exploiting transistor working in the subthreshold region is presented. Thanks to the adoption of a configurable active load, the circuit leads to 6.9× lower process sensitivity across corners. Post-layout simulations show a temperature coefficient equal to 19.4 ppm/°C and a line sensitivity of 0.009 %/V with an area occupation of only 0.000156 mm2.

    Slides
    • 28-nm CMOS Resistor-Less Voltage Reference with Process Corner Compensation (application/pdf)