Details
Presenter(s)
Display Name
Tania Moeinfard
- Affiliation
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AffiliationYork University
- Country
Abstract
Design, implementation, and post-layout validation of a DC-coupled chopper-stabilized continuous-time ΔΣ-based ADC-direct artifact-tolerant neural recording circuit is presented. The architecture employs a dual fine-coarse first-order ΔΣ modulator to simultaneously record neural signals in the presence of DC offset and differential artifact up to 140mV. Thanks to avoiding multi-bit DACs and using the same loop filter blocks for both neural recording and artifact compensation, a channel area of 0.035mm2 is achieved, which is largely dominated by process-scalable digital blocks. The recording circuit consumes 5.4μW and yields effective dynamic range of 50+40.9dB for neural signals and artifacts.