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Video s3
    Details
    Presenter(s)
    Dharmaray Nedalgi Headshot
    Display Name
    Dharmaray Nedalgi
    Affiliation
    Affiliation
    Intel Technology India Pvt Ltd Bengaluru
    Country
    Country
    India
    Author(s)
    Display Name
    Dharmaray Nedalgi
    Affiliation
    Affiliation
    Intel Technology India Pvt Ltd Bengaluru
    Display Name
    Saroja Siddamal
    Affiliation
    Affiliation
    KLE Technological University
    Abstract

    This paper presents a 2 × VDD tolerant I/O buffer using 1 × VDD devices, with hot-carrier and gate-oxide reliability considerations. The novel circuit for mixed voltage I/O buffer is proposed to solve the hot-carrier and gate-oxide reliability issues. The proposed circuit is designed in 22nm FinFET technology. The design can be used in any CMOS technology for 2 × VDD tolerant I/O buffer to reduce hot-carrier effect.

    Slides
    • 2 × VDD tolerant I/O with Considerations of Hot-Carrier Degradation and Gate-Oxide Reliability (application/pdf)