A selective harmonic elimination pulse width modulation (SHEPWM) class-D amplifier (CDA) with a reconfigurable gate driver integrated circuit (IC) is proposed. The H-bridge CDA generates a three-level SHEPWM signal and cancels lower order harmonics of the switching voltage. To generate accurate pulses at the right switching angles, GaN devices are used and a reconfigurable gate driver IC is used to control the driving strength of the gate driver. The SHEPWM algorithm is implemented in an FPGA and can configure the output on-the-fly. The simulation results show that the SHEPWM CDA has a 0.48 % total harmonic distortion (THD) for a 10 kHz output with an estimated switching loss of 38 mW for a GaN power transistor. It also shows that the driving strength of the gate driver has very little effect on THD, therefore the driving strength can be optimized between overshoot voltage and switching loss without concern for THD.