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Video s3
    Details
    Poster
    Presenter(s)
    George Lentaris Headshot
    Display Name
    George Lentaris
    Affiliation
    Affiliation
    National Technical University of Athens
    Country
    Abstract

    The paper proposes a method for guard-band customization to improve the energy efficiency of commercial FPGAs. We deploy custom delay-based sensors alongside any user design to indirectly monitor, in real-time, the functional integrity of the target under voltage scaling. We develop a reliable sensing mechanism and regulate the FPGA operation by holistically considering process, voltage, and temperature variations during run-time. Tests with Xilinx Zynq SoC FPGAs and real benchmarks show significant power savings, in the area of 16–27%, while preserving nominal timing performance for only 1.6% resource overhead.

    Slides
    • A PVT-Aware Voltage Scaling Method for Energy Efficient FPGAs (application/pdf)