Physical Unclonable Function (PUF) circuit extracts information from variations in a circuit and physical designs togenerate a unique key for electronics authentication, such as IoT devices and embedded systems. In this article, we proposed ahigh-speed pseudo linear feedback shift register with multiple ring oscillators PUF (PL-MRO PUF), replacing the registers inLFSR with combinational logic to resemble a delay-sensitivering oscillator (RO) circuit. Furthermore, the use of multiple LFSR-based ROs with each different number of stages to forma 128-bit PUF allows us to increase the output’s entropy and throughput. Hence, we have implemented the architecture in Xilinx Artix-7 FPGA series boards. We have improved the operating frequency by 1.95x, and improve FoM by 1.5x compared to the PL-PUF [1]. We also has achieved a higher randomness and uniqueness of 98.8% and 51.7%, respectively, compared to the conventional Arbiter PUF (A-PUF) [2].