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Video s3
    Details
    Poster
    Presenter(s)
    Shubham Kumar Headshot
    Display Name
    Shubham Kumar
    Affiliation
    Country
    Author(s)
    Display Name
    Shubham Kumar
    Affiliation
    Affiliation
    Indian Institute of Technology, Kanpur
    Affiliation
    Affiliation
    Indian Institute of Technology, Kanpur
    Display Name
    Chetan Dabhi
    Affiliation
    Affiliation
    University of California, Berkeley
    Display Name
    Hussam Amrouch
    Affiliation
    Affiliation
    University of Stuttgart
    Display Name
    Yogesh Chauhan
    Affiliation
    Affiliation
    Indian Institute of Technology, Kanpur
    Abstract

    Power side-channel (PSC) attacks have recently gained popularity to break into cyber-physical systems due to their non-invasiveness and proven effectiveness. In the CMOS circuit, the power dissipation when output transitions from `0\' to `1\' is different compared to the transition from `1\' to `0\'. The difference in power consumption results in input-dependent correlation, used for PSC to infer secret keys. This is the first work to investigate the impact of PSC on NCFET at the device level. For the first time, we demonstrate using Gate Work Function engineering to mitigate PSC attacks effectively.

    Slides
    • A Novel Approach to Mitigate Power Side-Channel Attacks for Emerging Negative Capacitance Transistor Technology (application/pdf)