Presentations
Supported-BinaryNet: Bitcell Array-Based Weight Supports for Dynamic Accuracy-Energy Trade-Offs in SRAM-Based Binarized Neural Network
Presented Date:Jul 08, 02:37pm UTCPresenter(s): Shamma Nasrin
A Behavioral Model of Digital Resistive Switching for Systems Level DNN Acceleration
Presented Date:Jul 08, 02:37pm UTCPresenter(s): Jason Eshraghian
Biologically Plausible Contrast Detection Using a Memristor Array
Presented Date:Jul 08, 02:37pm UTCPresenter(s): Jason Eshraghian
An In-Flash Binary Neural Network Accelerator with SLC NAND Flash Array
Presented Date:Jul 08, 02:37pm UTCPresenter(s): Won Ho Choi
Flash Based In-Memory Multiply-Accumulate Realisation: a Theoretical Study
Presented Date:Jul 08, 02:37pm UTCPresenter(s): Ashwin Balagopal S
Reliability-Driven Neural Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems
Presented Date:Jul 08, 02:37pm UTCPresenter(s): Junpeng Wang
Methodology for Realizing VMM with Binary RRAM Arrays: Experimental Demonstration of Binarized-ADALINE Using OxRAM Crossbar
Presented Date:Jul 08, 02:37pm UTCPresenter(s): Sandeep Kaur Kingra
Author(s): Sandeep Kaur Kingra, Vivek Parmar, Shubham Negi, Sufyan Khan, Boris Hudec, Tuo-Hung Hou, Manan Suri
Design and Fabrication of Flow-Based Edge Detection Memristor Crossbar Circuits
Presented Date:Jul 08, 02:37pm UTCPresenter(s): Jodh Pannu
Author(s): Jodh Pannu, Sunny Raj, Steven Fernandes, Sumit Jha, Dwaipayan Chakraborty, Sarah Rafiq, Nathaniel Cady
Chairs
Chair(s)
![Alejandro Linares-Barranco Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/Photo_Alex_INI.jpg?h=0833a0fe&itok=eJzToLYg)
Display Name
Alejandro Linares-Barranco
- Affiliation
-
AffiliationUniversidad de Sevilla
- Country
Display Name
Wesley Thio
- Affiliation
- Country