This brief presents a novel low power and area efficient LDO that satisfies all primary requirements of power mapping for a PMIC-SoC and can be used for wider load requirements. The design introduces a dynamically biased feed-back resistor which responds instantly to the output voltage variations, thereby achieving better load transient behavior. In addition, using an adaptive-biasing based on load current, the architecture transforms automatically to achieve stability over a wider range of load currents (0-100mA). It provides a regulated voltage of 1.8V from a supply ranging from 1.9V to 3.6V with a reported load and line regulation of 0.00136mV/mA and 0.078mV/V respectively. This design does not need any external calibration which in turn provides a cost-effective solution for SoC design house. Hence, it demonstrates a substantial steady-state and transient performance with low-power thus making it suitable for battery-operated portable devices.