This paper presents a detailed FPGA implementation methodology of Convolutional Spiking Neural Network based low-power and high-resolution radioisotope identification. A power budget of 74 mW has been achieved on an FPGA with the inference accuracy of 90.62% at a synthetic dataset. The design verification and chip validation methods are presented. It also discusses SNN simulation on SpiNNaker for rapid prototyping and various considerations specific to the application such as test distance, integration time, and SNN hyperparameter selections.