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Video s3
    Details
    Poster
    Presenter(s)
    Zu-Jia Lo Headshot
    Display Name
    Zu-Jia Lo
    Affiliation
    Affiliation
    National Taiwan University of Science and Technology
    Country
    Abstract

    In this paper, a four-channel floating-gate-based analog front-end (AFE) integrated circuit is presented. Each channel consists of a low noise amplifier (LNA), two operational- transconductance-amplifier-capacitor (OTA-C) biquadratic filters and two buffer amplifiers. Floating-gate transistors deployed in a two-dimensional array are utilized to facilitate circuit reconfigurability and to achieve better power efficiency. Floating-gate programming circuities are also designed on-chip. Furthermore, a serial-peripheral interface (SPI) circuit with floating-gate transistors as non-volatile memories is adopted as the circuit parameter storage as well as the control interface during floating-gate programming. A prototype chip is design and fabricated in a 0.35um CMOS process, occupying an area of 13.62mm2. The measured current consumption of single sensing front-end channel is only 76nA with the noise efficiency factor of 5.82. The measured output signal magnitude is 564.3mVpp with 1% total harmonic distortion.

    Slides
    • A Floating-Gate-Based Four-Channel Reconfigurable Analog Front-End Integrated Circuit (application/pdf)