This paper presents an experimental evaluation of the backpropagation-based technique for the background compensation of time-interleaved analog to digital converters (TI-ADC). Measurements obtained on a TI-ADC with 8b and up to 4GS/s test-chip fabricated in 130nm CMOS technology demonstrate the effectiveness of this technique. Historically, the error backpropagation algorithm has been used in machine learning applications. In a TI-ADC compensation application, the error at the slicer stage of a digital receiver is processed by the backpropagation algorithm to compute an equivalent error at the TI-ADC output, which otherwise would not be directly observable. Then, the backpropagated error can be applied to train an adaptive equalizer which compensates the TI-ADC mismatches. In comparison with prior art, the main advantages of this technique are its robustness, its high convergence speed, and its intrinsic background operation. Measurements show that the impact of the TI-ADC mismatch on the receiver performance is eliminated. In addition, an improvement in both the SNDR and SFDR of 23dB and 28dB, respectively, is observed at the Nyquist frequency when the compensation is applied.