A 2Í9-bit multiphase (MP) Class-G switched capacitor power amplifier (SCPA) prototype in a 65-nm CMOS with enhanced efficiency is proposed for digital intensive transmitters. In order to improve the peak output power, two independent power amplifier cells are employed rather than a shared cell, and the two cells are driven by two discrete fixed phases but not limited to adjacent phases. The two discrete fixed phases are determined by the proposed multiphase resolution of vector. Class-G operation is introduced to improve the efficiency within 6 dB back-off region. The simulated peak output power of MP Class-G SCPA is 27.17 dBm, a peak system efficiency of 41.73% and a 6 dB back-off system efficiency of 23.72%. Under the condition of 100 MHz 64-QAM signal with 7.2 dB PAPR, the PA achieves an average output power of 20. 43 dBm with an average system efficiency of 19.26%.