This paper proposes the design of a first-order single-bit continuous-time Delta-Sigma modulator using a memristive FIR DAC in the feedback. The coefficients of the 8-tap FIR filter are implemented using memristors with programmable resistance in the range of 17.20kOhms to 55.63kOhms, for better power and circuit area efficiency. Simulation results show that the FIR DAC can improve the modulator signal-to-noise and distortion ratio (SNDR) from 44.36dB to 62.29dB with the existence of 5ns RMS jitter at the sampling clock. The FIR DAC still contributes to a better modulator SNDR performance even considering the memristors\' worst-case 20% resistance variation.