In this paper a comprehensive design environment for continuous-time incremental Sigma-Delta ADCs is described. In the state of the art, the system-level design of incremental Sigma-Delta ADCs is based on the same methods as for their free-running counterparts, neglecting the ADCs specific behavior caused by the reset and the reconstruction filter. Moreover, the incremental ADCs performance is usually estimated with time-domain calculations based on a discrete-time prototype, neglecting major non-idealities. This work presents an automated design tool which directly accounts for the reset and the reconstruction filter. It is based on the framework provided by www.sigma-delta.de and allows therefore to design the ADC in the continuous-time domain, giving the designer a comprehensive overview of the performance and behavior of the ADC. It is shown that the tool allows to account and compensate for non-idealities such as excess-loop-delay, finite GBW and finite DC gain. A comparison with the state-of-the-art design process further proves the reliability of the tool for general usage.