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Video s3
    Details
    Poster
    Presenter(s)
    Boyang Zhang Headshot
    Display Name
    Boyang Zhang
    Affiliation
    Affiliation
    Peking University
    Country
    Abstract

    A novel structure of analog signal processing circuits for coherent receivers is proposed and implemented in 28-nm CMOS technology with 1V supply voltage. To avoid excessive taps in equalizer or prolix circuit modules, the system combines the crosstalk equalizer and carrier recovery circuits with the application of 2 kinds of multipliers to compensate linearity for higher accuracy. In order to further simplify the system realization, the chromatic dispersion equalizer uses DFE to eliminate post cursor. Simulation results show circuits are capable of equalizing signals of 40-ps/nm CD, 300-kHz dynamic polarization crosstalk and 100MHz frequency offset with the power of 1.45 Watt.

    Slides
    • Analog Signal Processing Circuits for a 400Gb/s 16QAM Optical Coherent Receiver (application/pdf)