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Video s3
    Details
    Poster
    Presenter(s)
    Rakesh Rena Headshot
    Display Name
    Rakesh Rena
    Affiliation
    Affiliation
    University of Hyderabad
    Country
    Abstract

    A process scalable architecture for low noise figure impedance matched sub-sampling mixer-first RF front-end is proposed, addressing the issues of noise-folding and impedance matching. A multi-path harmonic-rejection scheme is proposed to reject selected odd-harmonics of fs/4, alleviating the effect of noise-folding, leading to low noise figure. A combination of the complex-impedance band-pass filter and IF-LNA provide tuned impedance at the RF port of the sub-sampling front-end. In addition, frequency plan, amount of harmonic-rejection and its effect on noise figure is discussed. Performance predicted by analytical equations is in agreement with 1.2V, 65nm CMOS NB-IoT RF front-end Spectre-RF simulations.

    Slides
    • A Process Scalable Architecture for Low Noise Figure Sub-Sampling Mixer-First RF Front-End (application/pdf)