Successive Approximation Register (SAR) ADCs are nowadays widely used for applications that require medium resolution and a sampling rate anywhere from near-DC up to tens of GS/s. This presentation starts with an introduction why and how SAR ADCs have become such a dominant and attractive choice. A few examples will be given of key techniques that improve the efficiency of the comparator and the DAC, two of the most critical blocks in a low-power SAR ADC. The talk will further explain how the favorable features of the SAR ADC, like the dynamic power consumption as well as the small chip area, can be advantageously used inside versatile on-demand sensing applications, or area-constrained applications. Last but not least, the talk will elaborate on limitations, alternatives, and future expectations of the SAR ADC.