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![Miguel Cacho-Soblechero Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/15901.jpg?h=8f391919&itok=91IXlgie)
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AffiliationImperial College London
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This paper presents an Ion-to-Frequency ISFET architecture capable of operating at supplies as low as 0.2V, targeting fully-digital ultra-low power applications. The ISFET, biased in weak inversion, encodes the pH concentration as a frequency modulated digital signal by controlling the polarity and discharge rate of a capacitor. This architecture is implemented using digital gates operating at low voltages, achieving minimal power consumption and addressing the need for scalability to deep sub-micron technologies. Implemented in TSMC 0.18µm standard CMOS technology, each pixel occupies 20 µm x 21 µm and consumes a maximum of 33 pW while preserving a large sensitivity of 287 Hz/pH at a carrier frequency of 697Hz. Simulation results indicate low power consumption with a compact pixel size, becoming an efficient solution for the next-gen of portable and wearable applications.