Details
Presenter(s)
Display Name
Kaizhong Qiu
- Affiliation
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AffiliationTsinghua University
- Country
Abstract
In this paper, we propose a behavior-level modeling framework for memristor-based training-in-memory architectures, called MNSIM-TIME. Compared with existing modeling tools, MNSIM-TIME supports configurable architecture design and fast hardware performance modeling, which helps researchers to realize efficient design space exploration in the early architecture design stage.