Details
Presenter(s)
![Christian Gianoglio Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/10101.png?h=f6accbbc&itok=iSn8UGj1)
Display Name
Christian Gianoglio
- Affiliation
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AffiliationUniversity of Genoa
- Country
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CountryItaly
Abstract
With the growth of pervasive electronics, the availability of compact digital circuitry for the support of data processing is becoming a key requirement. This paper tackles the design of a digital architecture supporting the n-mode tensor-matrix product in fixed point representation. The design aims to minimize the resources occupancy, targeting low cost and low power devices. Tests on a Kintex-7 FPGA confirm that the architecture leads to an efficient digital implementation, which can afford real-time performances on benchmark applications with power consumption lower than 100 mW.